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- Path: felix.teclink.net!usenet
- From: rad@teclink.net (rad)
- Newsgroups: comp.sys.amiga.programmer
- Subject: Re: New C2P
- Date: 17 Jan 1996 03:50:17 GMT
- Organization: TECLink Internet Services: info@TECLink.Net
- Message-ID: <1405.6589T1284T2899@teclink.net>
- References: <9601141632.AA00423@dookie.demon.co.uk>
- NNTP-Posting-Host: tc1_51.teclink.net
- X-Newsreader: THOR 2.22 (Amiga;TCP/IP) *UNREGISTERED*
-
- Jonathan Belson <job@dookie.demon.co.uk> wrote:
- >Philipp Boerker (rawneiha@w352zrz.zrz.TU- Berlin.DE) wrote:
-
- >: >: It is because of the instrction burst in the 68030 and upwards.
- >: >: They benefit of having the loop startpoint 16 bytes aligned.
- >:
- >: >For burst mode to make a difference in execution speed, you need
- >: >static column RAM, surely?
- >:
- >: No, you don't. Try your 030 with Instr Burst disabled...
-
- >I tried SysInfo with all combinations of IBurst and DBurst, no difference
- >at all.
-
- >I had a look through one of my university texts : 'During a read miss, the
- >cache may optionally fill the entire cache line from main memory using four
- >longword read operations in a special burst mode. This feature improves
- >the performance of systems with certain types of memory chips that can read
- >from consecutive addresses faster than they can read from "random"
- >addresses' [Wakerly], ie. static column ram.
-
- Are you sure you're running in fast ram? (chip-ram is non-burstable.)
-
- ------------------------------------------------------------------------------
- - Richard Deken E-Mail (personal) rad@teclink.net -
- - VLSI design engineer (AuE business) rad@aue.com -
- - Advanced Microelectronics PGP public key available -
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